Hierarchical modeling for VLSI circuit testing
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| Main Author: | |
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| Other Authors: | |
| Format: | Unknown |
| Language: | English |
| Published: |
Boston
Kluwer Academic Publishers
1990
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| Series: | The Kluwer international series in engineering and computer science.
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| Subjects: | |
| Online Access: | Click Here to View Status and Holdings. |
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| LEADER | 00000n a2200000 a 4501 | ||
|---|---|---|---|
| 001 | wils-89024726 | ||
| 002 | 000055717 | ||
| 008 | 940618s1990 maua b 00110 eng | ||
| 020 | # | # | |a 079239058X |
| 040 | # | # | |a DLC |c DLC |d DLC |
| 090 | # | # | |a TK7874 |b .B484 1990 |
| 100 | # | # | |a Bhattacharya, Debashis |d 1961- |
| 245 | # | # | |a Hierarchical modeling for VLSI circuit testing |c by Debashis Bhattacharya, John P. Hayes |
| 260 | # | # | |a Boston |b Kluwer Academic Publishers |c 1990 |
| 300 | # | # | |a x, 159 p. |b ill. |c 24 cm |
| 490 | # | # | |a The Kluwer international series in engineering and computer science. |p VLSI, computer architecture, and digital signal processing |
| 504 | # | # | |a Includes bibliographical references (p. [149]-155). |
| 650 | # | # | |a Integrated circuits |x Very large scale integration |x Testing |
| 650 | # | # | |a Integrated circuits |x Very large scale integration |x Computer simulation |
| 700 | # | # | |a Hayes, John P. |q (John Patrickd1944- |
| 856 | 4 | 0 | |z Click Here to View Status and Holdings. |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=89024726 |
| 964 | # | # | |c BOK |d 01 |
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VLSI testing