Formal VLSI correctness verification proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design
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| Corporate Authors: | , |
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| Format: | Unknown |
| Published: |
Amsterdam New York
North-Holland
1990
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| Series: | VLSI design methods
2 |
| Subjects: | |
| Online Access: | Click Here to View Status and Holdings. |
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Formal VLSI specification and synthesis proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design
REKA BENTUK VLSI UNTUK KEBOLEHUJIAN
