Formal VLSI correctness verification proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design

Saved in:
Bibliographic Details
Corporate Authors: IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design, Interuniversity Micro-Electronics Center
Other Authors: Claesen, Luc J. M
Format: Unknown
Published: Amsterdam New York North-Holland 1990
Series:VLSI design methods 2
Subjects:
Online Access:Click Here to View Status and Holdings.
Tags: Add Tag
No Tags, Be the first to tag this record!