Formal VLSI correctness verification proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design
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| Format: | Unknown |
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Amsterdam New York
North-Holland
1990
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| Series: | VLSI design methods
2 |
| Subjects: | |
| Online Access: | Click Here to View Status and Holdings. |
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| 001 | wils-183166 | ||
| 020 | # | # | |a 0444886885 |
| 090 | 0 | 0 | |a TK7874 |b .I3283Pt.2 1990 |
| 110 | 1 | # | |a IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design |j Houthalen, Belgium |k 1989 |
| 245 | 1 | 0 | |a Formal VLSI correctness verification |b proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design |c sponsored by IMEC, Houthalen, Belgium, 13-16 November, 1989 ; edited by Luc J.M. Claesen |
| 260 | # | # | |a Amsterdam |a New York |b North-Holland |c 1990 |
| 300 | # | # | |a xv, 427 p. |b ill. |c 23 cm |
| 490 | 1 | # | |a VLSI design methods |v 2 |
| 504 | # | # | |a Includes bibliographical references |
| 650 | # | 0 | |a Computer-aided design |v Congresses |
| 650 | # | 0 | |a Integrated circuits |x Very large scale integration |x Design and construction |x Data processing |x Congresses |
| 650 | # | 0 | |a Integrated circuits |x Very large scale integration |x Testing |x Congresses |x Congresses |
| 700 | 1 | # | |a Claesen, Luc J. M |
| 710 | 1 | # | |a Interuniversity Micro-Electronics Center |
| 856 | 4 | 0 | |z Click Here to View Status and Holdings. |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=183166 |
| 964 | # | # | |c BOK |d 01 |
| 040 | # | # | |a Shah Alam |
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Formal VLSI specification and synthesis proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design