Verilog HDL Design Examples
The book presents the Verilog language with a variety of examples to provide a firm foundation in the design of the digital system using Verilog HDL. It places emphasis on the detailed design of various Verilog projects that include the design module, test bench module, and outputs from the simulato...
Saved in:
| Main Author: | |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
Boca Raton
Taylor & Francis Ltd
2020
|
| Edition: | Print Book, English, 2020 |
| Subjects: | |
| Online Access: | Click Here to View Status and Holdings. |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Add Tag MARC
| LEADER | 00000nam a2200000#i 4501 | ||
|---|---|---|---|
| 001 | wils-973512 | ||
| 005 | 2021616103153 | ||
| 008 | 230626t20202018-US ag# ##001 ##eng#D | ||
| 020 | # | # | |a 9780367778811 |q paperback |
| 040 | # | # | |a UiTM |b eng |c UiTM |e rda |
| 041 | 0 | # | |a eng |
| 090 | 0 | 0 | |a TK7868.D5 |b C38 2020 |
| 100 | 1 | # | |a Cavanagh, Joseph |e author |
| 245 | 0 | 0 | |a Verilog HDL Design Examples |c Joseph Cavanagh |
| 250 | # | # | |a Print Book, English, 2020 |
| 264 | # | 1 | |a Boca Raton |b Taylor & Francis Ltd |c 2020 |
| 264 | # | 4 | |c ©2018 |
| 300 | # | # | |a xv, 655 pages |b illustrations |c 27 cm |
| 336 | # | # | |a text |2 rdacontent |
| 337 | # | # | |a unmediated |2 rdamedia |
| 338 | # | # | |a volume |2 rdacarrier |
| 500 | # | # | |a Includes index |
| 520 | # | # | |a The book presents the Verilog language with a variety of examples to provide a firm foundation in the design of the digital system using Verilog HDL. It places emphasis on the detailed design of various Verilog projects that include the design module, test bench module, and outputs from the simulator illustrating the design's functional operation |
| 526 | 0 | # | |a Bachelor of Engineering (Hons) Electronics Engineering (EE241/CEEE241) |b Syllabus |5 Kolej Pengajian Kejuruteraan |
| 546 | # | # | |a In English |
| 650 | # | # | |a Verilog (Computer hardware description language) |
| 650 | # | # | |a Logic design |
| 650 | # | # | |a Digital electronics |
| 650 | # | # | |a Digital electronics Computer-aided design |
| 856 | 4 | 0 | |z Click Here to View Status and Holdings. |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=973512 |
| 964 | # | # | |c BOK |d 01 |
| 998 | # | # | |a 00250##a006.2.2||00250##b006.2.2||00264#1a006.2.2||00264#1b006.2.2||00300##a006.2.2||00300##b006.2.2||00300##c006.2.2||00500##a006.2.2||00520##a006.2.2||00520##b006.2.2||00546##a006.2.2|| |
Verilog HDL digital design and modeling