Algorithms and parallel VLSI architectures II proceedings of the held June 3-6
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Format: | Book |
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Amsterdam New York
Elsevier
1992
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LEADER | 00000n a2200000 a 4501 | ||
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001 | wils-66551 | ||
020 | # | # | |a 0444891536 |
090 | 0 | 0 | |a QA76.58 |b .I57 1991 |
110 | 1 | # | |a International Workshop on Algorithms and Parallel VLSI Architecture |i 2nd |j Gers, France |k 1991 |
245 | 1 | 0 | |a Algorithms and parallel VLSI architectures II |b proceedings of the held June 3-6 |c edited by PatriceQuinton, Yves Robert |
260 | # | # | |a Amsterdam |a New York |b Elsevier |c 1992 |
300 | # | # | |a xvi, 388 p. |b ill. |c 25 cm |
504 | # | # | |a Includes bibliographical references |
650 | # | 0 | |a Parallel processing (Electronic computers) |v Congresses |x Congresses |
650 | # | 0 | |a Computer architecture |v Congresses |x Congresses |
650 | # | 0 | |a Computer algorithms |v Congresses |x Very large scale integration |x Congresses |
650 | # | 0 | |a Integrated circuits |v Congresses |x Congresses |x Very large scale integration |
700 | 1 | # | |a Quinton, P. |q Patrice |
700 | # | # | |a Robert, Yves |c 1938- |
856 | 4 | 0 | |z Click Here to View Status and Holdings. |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=66551 |
964 | # | # | |c BOK |d 01 |
040 | # | # | |a Shah Alam |