A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA

A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA

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Bibliographic Details
Main Author: Siti Khatijah Nor Abdul Rahim
Corporate Authors: Institute of Research, Development and Commersialization (IRDC), Institut Penyelidikan, Pembangunan dan Pengkomersilan
Format: Thesis
Published: Shah Alam, Selangor Universiti Teknologi MARA. Institute of Research, Development and Commersialization (IRDC) 2006
Subjects:
Computer security
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