Digital system test and testable design using HDL models and architectures

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Bibliographic Details
Main Author:	Navabi, Zainalabedin
Format:	Book
Published:	New York Springer 2011
Subjects:	Digital integrated circuits > Design and construction Digital integrated circuits > Testing Verilog (Computer hardware description language) > Testing
Online Access:	Click Here to View Status and Holdings.
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001	wils-439956
020	#	#	\|a 9781441975478
020	#	#	\|a 1441975470
040	#	#	\|a SISPL \|d ITMB
090	0	0	\|a TK7874 \|b .N38 2011
100	1	#	\|a Navabi, Zainalabedin
245	1	0	\|a Digital system test and testable design \|b using HDL models and architectures \|c Zainalabedin Navabi
260	#	#	\|a New York \|b Springer \|c 2011
300	#	#	\|a xxiii, 435 p. \|b ill. \|c 24 cm
504	#	#	\|a Includes bibliographical references and index
650	#	0	\|a Digital integrated circuits \|x Design and construction
650	#	0	\|a Digital integrated circuits \|x Testing
650	#	0	\|a Verilog (Computer hardware description language) \|x Testing
856	4	0	\|z Click Here to View Status and Holdings. \|u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=439956
964	#	#	\|c BOK \|d EE