Transactional memory

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Bibliographic Details
Main Author:	Larus, James R.
Other Authors:	Rajwar, Ravi
Format:	Book
Published:	[San Rafael, Calif.] Morgan & Claypool 2007
Series:	Synthesis lectures on computer architecture 2
Subjects:	Transaction systems (Computer systems) Synchronization Parallel programming (Computer science) Threads (Computer programs)
Online Access:	Click Here to View Status and Holdings.
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020	#	#	\|a 9781188294132
020	#	#	\|a 159891246
020	#	#	\|a 9781598291247
040	#	#	\|a IND \|d ITMB
090	0	0	\|a QA76.545 \|b .L37 2007
100	1	#	\|a Larus, James R.
245	1	0	\|a Transactional memory \|c James R. Larus, Ravi Rajwar
260	#	#	\|a [San Rafael, Calif.] \|b Morgan & Claypool \|c 2007
300	#	#	\|a xiii, 211 p. \|b ill. \|c 24 cm
490	1	#	\|a Synthesis lectures on computer architecture \|v 2
504	#	#	\|a Includes bibliographical references (p. 202-205)
650	#	0	\|a Transaction systems (Computer systems)
650	#	0	\|a Synchronization
650	#	0	\|a Parallel programming (Computer science)
650	#	0	\|a Threads (Computer programs)
700	1	#	\|a Rajwar, Ravi
856	4	0	\|z Click Here to View Status and Holdings. \|u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=408595
964	#	#	\|c BOK \|d 01
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