Chip multiprocessor architecture techniques to improve throughput and latency

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Bibliographic Details
Main Author:	Olukotun, Oyekunle Ayinde
Other Authors:	Hammond, Lance, Laudon, James
Format:	Unknown
Published:	[San Rafael, Calif.] Morgan & Claypool Publishers 2007
Series:	Synthesis lectures on computer architecture 3
Subjects:	Parallel processing (Electronic computers) Computer architecture High performance processors
Online Access:	Click Here to View Status and Holdings.
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090	0	0	\|a QA76.58 \|b .O48 2007
100	1	#	\|a Olukotun, Oyekunle Ayinde
245	1	0	\|a Chip multiprocessor architecture \|b techniques to improve throughput and latency \|c Kunle Olukotun, Lance Hammond, James Laudon
260	#	#	\|a [San Rafael, Calif.] \|b Morgan & Claypool Publishers \|c 2007
300	#	#	\|a viii, 145 p. \|b col. ill. \|c 26cm
490	1	#	\|a Synthesis lectures on computer architecture \|v 3
504	#	#	\|a Includes bibliographical references
650	#	0	\|a Parallel processing (Electronic computers)
650	#	0	\|a Computer architecture
650	#	0	\|a High performance processors
700	1	#	\|a Hammond, Lance
700	#	#	\|a Laudon, James
856	4	0	\|z Click Here to View Status and Holdings. \|u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=408591
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