FSM-based digital design using Verilog HDL

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Bibliographic Details
Main Author:	Minns, Peter D.
Other Authors:	Elliott, Ian D.
Format:	Unknown
Published:	Chichester, England; Hoboken, NJ John Wiley & Sons 2008
Subjects:	Verilog (Computer hardware description language) Digital electronics Sequential machine theory
Online Access:	Click Here to View Status and Holdings.
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MARC


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100	1	#	\|a Minns, Peter D.
245	1	0	\|a FSM-based digital design using Verilog HDL \|c Peter Minns, Ian Elliott
246	1	#	\|a Finite state machine based digital design using Verilog HDL
260	#	#	\|a Chichester, England; \|a Hoboken, NJ \|b John Wiley & Sons \|c 2008
300	#	#	\|a xiii, 391 p. \|b ill. \|c 26 cm \|e 1 CD-ROM
504	#	#	\|a Includes bibliographical references and index
650	#	0	\|a Verilog (Computer hardware description language)
650	#	0	\|a Digital electronics
650	#	0	\|a Sequential machine theory
700	1	#	\|a Elliott, Ian D.
856	4	0	\|z Click Here to View Status and Holdings. \|u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=384310
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