Routing congestion in VLSI circuits estimation and optimization

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Bibliographic Details
Main Author:	Saxena, Prashant
Other Authors:	Shelar, Rupesh S., Sapatnekar, Sachin S. 1967-
Format:	Unknown
Published:	New York Springer 2007
Series:	Series on integrated circuits and systems
Subjects:	Integrated circuits > Very large scale integration Routing (Computer network management)
Online Access:	Click Here to View Status and Holdings.
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090	0	0	\|a TK7874.75 \|b .S39 2007
100	1	#	\|a Saxena, Prashant
245	1	0	\|a Routing congestion in VLSI circuits \|b estimation and optimization \|c Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar
260	#	#	\|a New York \|b Springer \|c 2007
300	#	#	\|a xiv, 248 p. \|b ill. \|c 24 cm
490	1	#	\|a Series on integrated circuits and systems
504	#	#	\|a Includes bibliographical references and index
650	#	0	\|a Integrated circuits \|x Very large scale integration
650	#	0	\|a Routing (Computer network management)
700	1	#	\|a Shelar, Rupesh S.
700	#	#	\|a Sapatnekar, Sachin S. \|c 1967-
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