System-on-chip test architectures nanometer design for testability

System-on-chip test architectures nanometer design for testability

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Bibliographic Details
Other Authors: Wang, Laung-Terng, Stroud, Charles E., Touba, Nur A.
Format: Unknown
Published: Amsterdam Boston Morgan Kaufmann Publishers 2008
Series:The Morgan Kaufmann series in systems on silicon
Subjects:
Systems on a chip > Testing
Integrated circuits > Very large scale integration > Testing
Integrated circuits > Very large scale integration > Design
Online Access:Click Here to View Status and Holdings.
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