SystemVerilog for verification a guide to learning the testbench language features

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Bibliographic Details
Main Author:	Spear, Chris
Format:	Unknown
Published:	New York, NY Springer 2006
Subjects:	Verilog (Computer hardware description language) Integrated circuits > Verification
Online Access:	Click Here to View Status and Holdings.
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MARC


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020	#	#	\|a 9780387270364 (hbk.)
020	#	#	\|a 9780387270388 (e-isbn)
020	#	#	\|a 0387270361 (hbk.)
020	#	#	\|a 0387270388 (e-isbn)
040	#	#	\|a OHX \|d ITMB
090	0	0	\|a TK7885.7 \|b .S67 2006
100	1	#	\|a Spear, Chris
245	1	1	\|a SystemVerilog for verification \|b a guide to learning the testbench language features \|c Chris Spear
260	#	#	\|a New York, NY \|b Springer \|c 2006
300	#	#	\|a xxxiv, 301 p. \|b ill. \|c 25 cm
504	#	#	\|a Includes bibliographical references (p. [295]-296) and index
650	#	0	\|a Verilog (Computer hardware description language)
650	#	0	\|a Integrated circuits \|x Verification
856	4	0	\|z Click Here to View Status and Holdings. \|u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=363165
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