SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling

SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling

Saved in:
Bibliographic Details
Main Author: Sutherland, Stuart
Other Authors: Davidmann, Simon, Flake, Peter
Format: Unknown
Published: New York, NY Springer 2006
Edition:2nd ed
Subjects:
Electronic digital computers > Design and construction
Verilog (Computer hardware description language)
Computer simulation
Online Access:Click Here to View Status and Holdings.
Tags: Add Tag
No Tags, Be the first to tag this record!

MARC

LEADER 00000n a2200000 a 4501
001 wils-363090
020 # # |a 9780387333991 (alk. paper) 
020 # # |a 0387333991 (alk. paper) 
020 # # |a 0387364951 
020 # # |a 9780387364957 
040 # # |a DLC  |d ITMB 
090 0 0 |a TK7885.7  |b .S875 2006 
100 1 # |a Sutherland, Stuart 
245 1 1 |a SystemVerilog for design  |b a guide to using SystemVerilog for hardware design and modeling  |c by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby 
250 # # |a 2nd ed 
260 # # |a New York, NY  |b Springer  |c 2006 
300 # # |a xxx, 418 p.  |b ill.  |c 25 cm 
504 # # |a Includes bibliographical references and index 
650 # 0 |a Electronic digital computers  |x Design and construction 
650 # 0 |a Verilog (Computer hardware description language) 
650 # 0 |a Computer simulation 
700 1 # |a Davidmann, Simon 
700 # # |a Flake, Peter 
856 4 0 |z Click Here to View Status and Holdings.  |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=363090 
964 # # |c BOK  |d 01 
998 # # |a 00250##a0011.2.2||00260##a0011.2.2||00260##b0011.2.2||00260##c0011.2.2||00300##a0011.2.2||00300##b0011.2.2||00300##c0011.2.2||01700##a0011.2.2|| 

Similar Items