SystemVerilog for design a guide to using SystemVerilog for hardware design and modeling

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Bibliographic Details
Main Author:	Sutherland, Stuart
Other Authors:	Davidmann, Simon, Flake, Peter
Format:	Book
Published:	New York, NY Springer 2006
Edition:	2nd ed
Subjects:	Electronic digital computers > Design and construction Verilog (Computer hardware description language) Computer simulation
Online Access:	Click Here to View Status and Holdings.
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100	1	#	\|a Sutherland, Stuart
245	1	1	\|a SystemVerilog for design \|b a guide to using SystemVerilog for hardware design and modeling \|c by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby
250	#	#	\|a 2nd ed
260	#	#	\|a New York, NY \|b Springer \|c 2006
300	#	#	\|a xxx, 418 p. \|b ill. \|c 25 cm
504	#	#	\|a Includes bibliographical references and index
650	#	0	\|a Electronic digital computers \|x Design and construction
650	#	0	\|a Verilog (Computer hardware description language)
650	#	0	\|a Computer simulation
700	1	#	\|a Davidmann, Simon
700	#	#	\|a Flake, Peter
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