Advanced Digital Logic Design Using Verilog, State Machines, and Synthesis for FPGAs

This textbook is intended to serve as a practical guide for the design of complex digital logic circuits such as digital control circuits, network interface circuits, pipelined arithmetic units, and RISC microprocessors. It is an advanced digital logic design textbook that emphasizes the use of synt...

Full description

Saved in:
Bibliographic Details
Main Author: Lee, Sunggu (Author)
Format: Book
Language:English
Published: Australia THOMSON 2006
Subjects:
Online Access:Click Here to View Status and Holdings.
Tags: Add Tag
No Tags, Be the first to tag this record!

MARC

LEADER 00000cam#a2200000#i#4501
001 wils-363077
005 202394103621
008 231004t2006 AT ag# ##001 ##eng#D
020 # # |a 0534551610  |q hardback 
020 # # |a 9780534551612  |q hardback 
040 # # |a UiTM  |b eng  |e rda 
090 0 0 |a TK7868.L6  |b L453 2006 
100 1 # |a Lee, Sunggu  |e author 
245 1 0 |a Advanced Digital Logic Design  |b Using Verilog, State Machines, and Synthesis for FPGAs  |c Sunggu Lee 
264 # 1 |a Australia  |b THOMSON  |c 2006 
264 # 4 |c ©2006 
300 # # |a xvii, 462 pages  |b illustrations  |c 24 cm 
336 # # |a text  |2 rdacontent 
337 # # |a unmediated  |2 rdamedia 
338 # # |a volume  |2 rdacarrier 
504 # # |a Includes bibliographical references and index 
520 # # |a This textbook is intended to serve as a practical guide for the design of complex digital logic circuits such as digital control circuits, network interface circuits, pipelined arithmetic units, and RISC microprocessors. It is an advanced digital logic design textbook that emphasizes the use of synthesizable Verilog code and provides numerous fully worked-out practical design examples including a Universal Serial Bus interface, a pipelined multiply-accumulate unit, and a pipelined microprocessor for the ARM THUMB architecture 
650 # 0 |a Digital electronics 
650 # 0 |a Verilog (Computer hardware description language) 
650 # 0 |a Logic design  |x Data processing 
856 4 0 |z Click Here to View Status and Holdings.  |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=363077 
964 # # |c BOK  |d 01 
998 # # |a 00264#1a002.8.2||00264#1b002.8.4||00300##a003.5.1||00300##b003.5.1||00300##c003.5.1||00520##a007.2||00520##b007.2||