Digital design with CPLD applications and VHDL
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Main Author: | |
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Format: | Book |
Published: |
Clifton Park, NY
Thomson/Delmar Learning
2005
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Edition: | Second edition |
Subjects: | |
Online Access: | Click Here to View Status and Holdings. |
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001 | wils-360235 | ||
005 | 2018715121516 | ||
008 | t2005 XXU a## ##001 ## bi#D | ||
020 | # | # | |a 1401840302 |
020 | # | # | |a 9018403037814 |q hardback |
040 | # | # | |a DLC |d ITMB |e rda |
090 | 0 | 0 | |a TK7872.L64 |b D84 2005 |
100 | 1 | # | |a Dueck, Robert K. |
245 | 1 | 0 | |a Digital design with CPLD applications and VHDL |c Robert K. Dueck |
250 | # | # | |a Second edition |
264 | # | 1 | |a Clifton Park, NY |b Thomson/Delmar Learning |c 2005 |
264 | # | 4 | |c ©2005 |
300 | # | # | |a xx, 1004 pages |b illustrations (some color) |c 29 cm |e 1 CD-ROM (4 3/4 in.) |
336 | # | # | |a rdacontent |2 text |
337 | # | # | |a rdamedia |2 unmediated |
338 | # | # | |a rdacarrier |2 volume |
500 | # | # | |a Includes index |
650 | # | 0 | |a Logic design |x Design and construction |
650 | # | 0 | |a VHDL (Computer hardware description language) |
650 | # | 0 | |a Programmable array logic |
650 | # | 0 | |a Programmable logic devices |x Design and construction |
856 | 4 | 0 | |z Click Here to View Status and Holdings. |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=360235 |
964 | # | # | |c BOK |d 01 |
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