Verification methodology manual for SystemVerilog

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Bibliographic Details
Other Authors:	Bergeron, Janick
Format:	Book
Published:	New York Springer 2006
Subjects:	Verilog (Computer hardware description language) > Verification Integrated circuits > Verification
Online Access:	Click Here to View Status and Holdings.
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090	0	0	\|a TK7885.7 \|b .V44 2006
245	0	0	\|a Verification methodology manual for SystemVerilog \|c by Janick Bergeron ... [et al.]
260	#	#	\|a New York \|b Springer \|c 2006
300	#	#	\|a xvii, 503 p. \|b ill. \|c 24 cm
504	#	#	\|a Includes bibliographical references and index
650	#	0	\|a Verilog (Computer hardware description language) \|x Verification
650	#	0	\|a Integrated circuits \|x Verification
700	1	#	\|a Bergeron, Janick
856	4	0	\|z Click Here to View Status and Holdings. \|u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=348981
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