CMOS PLL synthesizers analysis and design

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Bibliographic Details
Main Author:	Shu, Keliu
Other Authors:	Sanchez-Sinencio, Edgar
Format:	Book
Published:	New York, N.Y. Springer 2005
Series:	Kluwer international series in engineering and computer science Analog circuits and signal processing 783
Subjects:	Phase-locked loops Metal oxide semiconductors, Complementary Frequency synthesizers > Design and construction
Online Access:	Click Here to View Status and Holdings.
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020	#	#	\|a 0387236686
020	#	#	\|a 0387236694 (e-ISBN)
090	0	0	\|a TK7872.F73 \|b S58 2005
100	1	#	\|a Shu, Keliu
245	1	1	\|a CMOS PLL synthesizers \|b analysis and design \|c Keliu Shu, Edgar Sanchez-Sinencio
260	#	#	\|a New York, N.Y. \|b Springer \|c 2005
300	#	#	\|a xvi, 215 p. \|b ill. \|c 25 cm
490	1	#	\|a Kluwer international series in engineering and computer science \|a Analog circuits and signal processing \|v 783
504	#	#	\|a Includes bibliographical references and index
650	#	0	\|a Phase-locked loops
650	#	0	\|a Metal oxide semiconductors, Complementary
650	#	0	\|a Frequency synthesizers \|x Design and construction
700	1	#	\|a Sanchez-Sinencio, Edgar
840	#	#	\|a Kluwer international series in engineering and computer science \|v 783
840	#	#	\|a Kluwer international series in engineering and computer science \|p Analog circuits and signal processing
856	4	0	\|z Click Here to View Status and Holdings. \|u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=347601
964	#	#	\|c BOK \|d 01
040	#	#	\|a Shah Alam
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