Logic synthesis and verification algorithms

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Bibliographic Details
Main Author:	Hachtel, Gary D
Other Authors:	Somenzi, Fabio
Format:	Unknown
Published:	New York Springer 2006
Subjects:	Computer-aided design Logic design > Data processing Integrated circuits > Very large scale integration > Design and construction > Data processing Integrated circuits > Verification
Online Access:	Click Here to View Status and Holdings.
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Logic synthesis and verification algorithms by Hachtel, Gary D.

Published 1996

Click Here to View Status and Holdings.

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