Modeling, synthesis, and rapid prototyping with the Verilog HDL

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Bibliographic Details
Main Author: Ciletti, Michael D
Format: Book
Published: Upper Saddle River, N.J. Prentice Hall 1999
Subjects:
Online Access:Click Here to View Status and Holdings.
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090 0 0 |a TK7885.7  |b .C55 1999 
100 1 # |a Ciletti, Michael D 
245 1 1 |a Modeling, synthesis, and rapid prototyping with the Verilog HDL  |c Michael D. Ciletti 
260 # # |a Upper Saddle River, N.J.  |b Prentice Hall  |c 1999 
300 # # |a xxii, 727 p.  |b ill.  |c 25 cm.  |e 4 computer laser optical disks (4 3/4 in.) 
504 # # |a Includes bibliographical references and index 
650 # 0 |a Rapid prototyping 
650 # 0 |a Verilog (Computer hardware description language) 
856 4 0 |z Click Here to View Status and Holdings.  |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=335808 
964 # # |c BOK  |d 01 
040 # # |a Shah Alam