Designing digital computer systems with Verilog
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Cambridge, UK New York
Cambridge University Press
2005
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Online Access: | Click Here to View Status and Holdings. |
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LEADER | 00000n a2200000 a 4501 | ||
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001 | wils-333378 | ||
020 | # | # | |a 052182866X (alk. paper) |
090 | 0 | 0 | |a TK7885.7 |b .L55 2005 |
100 | 1 | # | |a Lilja, David J. |
245 | 1 | 1 | |a Designing digital computer systems with Verilog |c David J. Lilja and Sachin S. Sapatnekar |
260 | # | # | |a Cambridge, UK |a New York |b Cambridge University Press |c 2005 |
300 | # | # | |a ix, 160 p. |b ill. |c 26 cm |
504 | # | # | |a Includes bibliographical references and index |
650 | # | 0 | |a Verilog (Computer hardware description language) |
650 | # | 0 | |a Electronic digital computers |x Design and construction |
700 | 1 | # | |a Sapatnekar, Sachin S. |c 1967- |
856 | 4 | 0 | |z Click Here to View Status and Holdings. |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=333378 |
964 | # | # | |c BOK |d 01 |
040 | # | # | |a Shah Alam |
998 | # | # | |a 00260##a002.8.2||00260##a002.8.2||00260##b002.8.4||00260##c002.7.6||00300##a003.4.1||00300##b003.6.1||00300##c003.5.1|| |