System-On-A-Chip verification methodology and techniques

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Bibliographic Details
Main Author:	Rashinkar, Prakash 1960-
Other Authors:	Paterson, Peter 1955-, Singh, Leena 1971-
Format:	Unknown
Published:	Boston, MA Kluwer Academic Publishers 2001
Subjects:	Electronic digital computers > Design and construction System design Computer software > Development
Online Access:	Click Here to View Status and Holdings.
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001	wils-295610
020	#	#	\|a 0792372794
090	0	0	\|a QA76.9.S88 \|b R37 2001
100	1	#	\|a Rashinkar, Prakash \|c 1960-
245	1	1	\|a System-On-A-Chip verification \|b methodology and techniques \|c Prakash Rashinkar, Peter Paterson, Leena Singh
260	#	#	\|a Boston, MA \|b Kluwer Academic Publishers \|c 2001
300	#	#	\|a xiii, 372 p. \|b ill. \|c 25 cm
504	#	#	\|a Includes bibliographical references and index
650	#	0	\|a Electronic digital computers \|x Design and construction
650	#	0	\|a System design
650	#	0	\|a Computer software \|x Development
700	1	#	\|a Paterson, Peter \|c 1955-
700	#	#	\|a Singh, Leena \|c 1971-
856	4	0	\|z Click Here to View Status and Holdings. \|u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=295610
964	#	#	\|c BOK \|d 01
040	#	#	\|a Shah Alam
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