Logic synthesis and verification algorithms

Saved in:

Bibliographic Details
Main Author:	Hachtel, Gary D.
Other Authors:	Somenzi, Fabio
Format:	Unknown
Published:	Boston Kluwer Academic Publishersr 1996
Subjects:	Login design > Data processing Integrated circuits > Verification Integrated circuits > Very large scale integration > Design > Data processing
Online Access:	Click Here to View Status and Holdings.
Tags:	Add Tag No Tags, Be the first to tag this record!

Logic synthesis and verification algorithms by Hachtel, Gary D

Published 2006

Click Here to View Status and Holdings.

Unknown