VLSI chip design with the hardware description language VERILOG an introduction based on a large RISC processor design
Saved in:
| Main Author: | |
|---|---|
| Format: | Unknown |
| Published: |
Berlin
Springer-Verlag
1996
|
| Subjects: | |
| Online Access: | Click Here to View Status and Holdings. |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Add Tag MARC
| LEADER | 00000n a2200000 a 4501 | ||
|---|---|---|---|
| 001 | wils-208646 | ||
| 020 | # | # | |a 3540600329 |
| 090 | 0 | 0 | |a TK7874.75 |b .G65 1996 |
| 100 | 1 | # | |a Golze, Ulrich |c 1948- |
| 245 | 1 | 1 | |a VLSI chip design with the hardware description language VERILOG |b an introduction based on a large RISC processor design |c Ulrich Golze |
| 260 | # | # | |a Berlin |b Springer-Verlag |c 1996 |
| 300 | # | # | |a xiv, 359 p. |b ill. |c 24 cm |e 1 computer disk |
| 504 | # | # | |a Includes bibliographical references and index |
| 650 | # | 0 | |a Integrated circuits |x Very large scale |
| 650 | # | 0 | |a Integration |x Computer-aided design |
| 650 | # | 0 | |a RISC microprocessors |x Computer-aided design |
| 856 | 4 | 0 | |z Click Here to View Status and Holdings. |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=208646 |
| 964 | # | # | |c BOK |d 01 |
| 040 | # | # | |a Shah Alam |
| 998 | # | # | |a 00260##a002.8.2||00260##b002.8.4||00260##c002.7.6||00300##a003.4.1||00300##b003.6.1||00300##c003.5.1|| |
Digital vlsi design