Formal VLSI specification and synthesis proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design

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Bibliographic Details
Corporate Authors: IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design, Interuniversity Micro-Electronics Center
Other Authors: Claesen, Luc J. M
Format: Unknown
Published: Amsterdam North-Holland 1990
Series:VLSI design methods 1
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Online Access:Click Here to View Status and Holdings.
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090 0 0 |a TK7874  |b .I3283Pt.1 1990 
110 1 # |a IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design  |j Houthalen, Belgium  |k 1989 
245 1 0 |a Formal VLSI specification and synthesis  |b proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design  |c sponsored by IMEC, Houthalen, Belgium, 13-16 November, 1989 ; edited by Luc J.M. Claesen 
260 # # |a Amsterdam  |b North-Holland  |c 1990 
300 # # |a xv, 414 p.  |b ill.  |c 23 cm 
490 1 # |a VLSI design methods  |v 1 
504 # # |a Includes bibliographical references 
650 # 0 |a Computer-aided design  |v Congresses  |x Very large scale integration  |x Design and construction  |x Data processing  |x Congresses 
650 # 0 |a Integrated circuits  |x Very large scale integration  |x Design and construction  |x Data processing  |x Congresses 
650 # 0 |a Integrated circuits  |v Congresses  |x Testing  |x Congresses  |x Very large scale integration 
700 1 # |a Claesen, Luc J. M 
710 1 # |a Interuniversity Micro-Electronics Center 
856 4 0 |z Click Here to View Status and Holdings.  |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=183165 
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