Integrating functional and temporal domains in logic design the false path problem and its implications
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Other Authors: | |
Format: | Unknown |
Published: |
Boston
Kluwer Academic
1991
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Series: | The Kluwer international series in engineering and computer science VLSI, computer architecture, and digital signal processing
SECS 139. |
Subjects: | |
Online Access: | Click Here to View Status and Holdings. |
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LEADER | 00000n a2200000 a 4501 | ||
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001 | wils-124642 | ||
002 | 000165445 | ||
020 | # | # | |a 0792391632 |
090 | 0 | 0 | |a TK7868.L6 |b M4 1991 |
100 | 1 | # | |a McGeer, Patrick C |
245 | 1 | 1 | |a Integrating functional and temporal domains in logic design |b the false path problem and its implications |c by Patrick C. McGeer and Robert K. Brayton |
260 | # | # | |a Boston |b Kluwer Academic |c 1991 |
300 | # | # | |a xxii, 212 p. |b ill. |c 25 cm |
490 | 1 | # | |a The Kluwer international series in engineering and computer science |a VLSI, computer architecture, and digital signal processing |v SECS 139. |
504 | # | # | |a Includes bibliographical references (p. 203-210) and index |
650 | # | 1 | |a Logic design |x Data processing |
650 | # | # | |a Integrated circuits |x Very large scale integration |x Design and construction |x Data processing |
650 | # | # | |a Computer-aided design |
700 | 1 | # | |a Brayton, Robert King |
856 | 4 | 0 | |z Click Here to View Status and Holdings. |u https://opac.uitm.edu.my/opac/detailsPage/detailsHome.jsp?tid=124642 |
964 | # | # | |c BOK |d 01 |
040 | # | # | |a Shah Alam |
998 | # | # | |a 00260##a002.8.2||00260##b002.8.4||00260##c002.7.6||00300##a003.4.1||00300##b003.6.1||00300##c003.5.1|| |